GATE CSE 2014 SET-1
Q31.
Assume that there are 3 page frames which are initially empty. If the page reference string 1, 2, 3, 4, 2, 1, 5, 3, 2, 4, 6, the number of page faults using the optimal replacement policy is ______Q32.
Consider the finite automaton in the following figure. What is the set of reachable states for the input string 0011?Q33.
Which of the regular expressions given below represent the following DFA? I) 0*1(1+00*1)* II) 0*1*1+11*0*1 III) (0+1)*1Q34.
Which one of the following are used to generate a message digest by the network security protocols? (P) RSA (Q) SHA-1 (R) DES (S) MD5Q35.
The base (or radix) of the number system such that the following equation holds is_______. \frac{312}{20}=13.1Q36.
Given the following two statements: S1: Every table with two single-valued attributes is in 1NF, 2NF, 3NF and BCNF S2 : AB\rightarrowC, D\rightarrow E, E\rightarrowC is a minimal cover for the set of functional dependencies AB\rightarrowC, D\rightarrowE, AB\rightarrow E,E\rightarrowC. Which one of the following is CORRECT?Q37.
A machine has a 32-bit architecture, with 1-word long instructions. It has 64 registers, each of which is 32 bits long. It needs to support 45 instructions, which have an immediate operand in addition to two register operands. Assuming that the immediate operand is an unsigned integer, the maximum value of the immediate operand is ____________.Q38.
A canonical set of items is given below S\rightarrow L. \gt R Q\rightarrowR. On input symbol \lt the set hasQ39.
Consider two processors P1 and P2 executing the same instruction set. Assume that under identical conditions, for the same input, a program running on P2 takes 25% less time but incurs 20% more CPI (clock cycles per instruction) as compared to the program running on P1. If the clock frequency of P1 is 1GHz, then the clock frequency of P2 (in GHz) is _________.Q40.
Consider a 6-stage instruction pipeline, where all stages are perfectly balanced. Assume that there is no cycle-time overhead of pipelining. When an application is executing on this 6-stage pipeline, the speedup achieved with respect to non-pipelined execution if 25% of the instructions incur 2 pipeline stall cycles is _________.